Making Sequential Consistency Practical in Titanium Session: Optimizing Compilers Event Type: Paper Time: 2:30pm - 3:00pm Session Chair: Jeffrey K. Hollingsworth Speaker(s): Amir Ashraf Kamil, Jimmy Zhigang Su, Katherine Anne Yelick Location: 608-609 Abstract: The memory consistency model in parallel programming controls the order in which operations performed by one thread may be observed by another. Language designers have been reluctant to use the most natural model, sequential consistency, where accesses appear to take effect in the order originally specified, due to performance concerns. We present evidence for its practicality by showing that advanced compiler analyses can eliminate most memory fences and enable high-level optimizations. Our analyses eliminated nearly all of the memory fences needed by a naive implementation, accounting for most of the dynamically encountered fences in all but one benchmark. We additionally consider two specific optimizations that sequential consistency can prevent, and show that our most aggressive analysis is able to obtain the same performance as the relaxed model when applied to two linear algebra kernels. We believe these results provide important evidence on the viability of sequential consistency without sacrificing performance. Awards: Best Paper Nomination This paper can be found in the ACM and IEEE Digital Libaries Click here for ACM Click here for IEEE Chair/Speaker Details: Jeffrey K. Hollingsworth (Chair) University of Maryland Amir Ashraf Kamil UC Berkeley Jimmy Zhigang Su UC Berkeley Katherine Anne Yelick UC Berkeley